REV. A
ADM1027
13
VID CODE MONITORING
The ADM1027 has five dedicated voltage ID (VID code) inputs.
These are digital inputs that can be read back through the
VID register (Reg. 0x43) to determine the processor voltage
required/being used in the system. Five VID code inputs
support VRM9.x solutions.
VID CODE REGISTER Register 0x43
<0> = VID0 (reflects logic state of Pin 5)
<1> = VID1 (reflects logic state of Pin 6)
<2> = VID2 (reflects logic state of Pin 7)
<3> = VID3 (reflects logic state of Pin 8)
<4> = VID4 (reflects logic state of Pin 19)
ADDITIONAL ADC FUNCTIONS
A number of other functions are available on the ADM1027 to
offer the systems designer increased flexibility:
Turn Off Averaging
For each voltage measurement read from a value register,
16 readings have actually been made internally and the results
averaged before being placed into the value register. There may
be an instance where the user would like to speed up conversions.
Setting Bit 4 of Configuration Register 2 (Reg. 0x73) turns
averaging off. This effectively gives a reading 16?faster than
711 ms, but the reading may be noisier.
Bypass Voltage Input Attenuators
Setting Bit 5 of Configuration Register 2 (Reg. 0x73) removes
the attenuation circuitry from the 2.5 V, V
CCP
, V
CC
, 5 V, and
12 V inputs. This allows the user to directly connect external
sensors or rescale the analog voltage measurement inputs for
other applications. The input range of the ADC without the
attenuators is 0 V to 2.25 V.
Single-Channel ADC Conversions
Setting Bit 6 of Configuration Register 2 (Reg. 0x73) places the
ADM1027 into single-channel ADC conversion mode. In this
mode, the ADM1027 can be made to read a single voltage channel
only. If the internal ADM1027 clock is used, the selected input
will be read every 711 ms. The appropriate ADC channel is
selected by writing to Bits <7:5> of TACH1 minimum high
byte register (0x55).
Bits <7:5> Reg. 0x55
Channel Selected
000
2.5 V
001
V
CCP
010
V
CC
011
5 V
100
12 V
Configuration Register 2 (Reg. 0x73)
<4> = 1 Averaging off
<5> = 1 Bypass input attenuators
<6> = 1 Single-channel convert mode
TACH1 Minimum High Byte (Reg. 0x55)
<7:5> Selects ADC channel for single-channel convert mode
Rev. 3 | Page 13 of 56 | www.onsemi.com
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